A field effect transistor (FET) is a transistor for controlling a current flowing between a source electrode and a drain electrode by applying a voltage to a gate electrode to provide a gate for the flow of electrons or holes based on an electric field of a channel.
An FET has been used as a switching element or an amplifying element due to its characteristics. Since an FET shows a small gate current and has a flat profile, it can be easily manufactured or integrated compared to a bipolar transistor. Therefore, an FET is an indispensable element in an integrated circuit used in current electronic devices.
An FET has been applied as a thin film transistor (TFT) in an active matrix type display.
In recent years, liquid crystal displays, organic EL (electroluminescent) displays, electronic paper, and the like have been made into practical use as flat panel displays (FPDs).
FPDs are driven by a driver circuit including a TFT having an active layer formed of amorphous silicon or polycrystalline silicon. There is demand for FPDs to achieve further enlargement, higher definition, and a higher driving speed. In accordance with these demands, TFTs having higher carrier mobility, less characteristic change over time, and less inter-element characteristic variations in a panel have been demanded.
TFTs having an active layer formed of amorphous silicon (a-Si) or polycrystalline silicon (particularly low temperature polycrystalline silicon (LIPS)) have advantages and disadvantages. Therefore, it has been difficult to satisfy all the demands at the same time.
For example, a-Si TFT has disadvantages of insufficient mobility for driving a large screen LCD (Liquid Crystal Display) at a high speed, and a large shift of a threshold voltage in continuous driving. Although LTPS-TFTs have high mobility, they have a disadvantage in that threshold voltages largely vary due to a process for crystallizing an active layer by annealing using an excimer laser; therefore, a large-sized mother glass for the mass production line may not be used.
Thus, there is a demand for a novel TFT technology having combined advantages of a-Si TFT and LTPS-TFT. To satisfy these demands, a TFT formed by using an oxide semiconductor, in which higher carrier mobility than amorphous silicon (a-Si) is expected, has been actively developed.
Specifically, after Nomura et. al. disclosed a TFT formed by using an amorphous InGaZnO4 (a-IGZO) capable of being deposited at room temperature and exhibiting higher carrier mobility than amorphous silicon (a-Si) in NATURE (K. Nomura et. al., “Room-temperature fabrication of transparent flexible thin-film transistors using amorphous oxide semiconductors”, NATURE, VOL. 432, No. 25, November, 2004, p. 488-492; hereinafter referred to as “Non-Patent Document 1”), numerous studies on an amorphous oxide semiconductor having high carrier mobility have been extensively carried out.
However, in such amorphous oxide semiconductors, carrier electrons are generated by oxygen vacancy. Thus, oxygen concentration needs in a deposition process needs to be rigorously controlled. The TFT characteristics of the amorphous oxide semiconductor may easily result in a depletion mode when attempting to achieve high mobility. In addition, a process window may be too narrow to achieve a normally-off characteristic. Further, since oxide concentration in a film is changed in a patterning process or a passivation process after the deposition process of the active layer, the TFT characteristics may be degraded due to characteristic change of the oxide semiconductor.
In related art technologies, countermeasures of such drawbacks have been attempted in two aspects. For example, Japanese Patent Application Publication No. 2002-76356 (hereinafter also referred to as “Patent Document 1”) and Japanese Patent Application Publication No. 2006-165529 (hereinafter also referred to as “Patent Document 2”) disclose examples of such countermeasures. A first example is a method in which carriers generated due to oxide vacancy are compensated for by introducing a p-type dopant. A second example is a method disclosed by J. S. Park et al. in Advanced Materials (J. S. Park et al., “Novel ZrInZnO Thin-film Transistor with Excellent Stability”, Advanced Materials, VOL. 21, No. 3, 2009, p. 329-333; hereinafter also referred to as “Non-Patent Document 2”). In the second example, carrier generation is controlled by introducing a certain amount of a metallic element (e.g., Al, Zr, and Hf) having high affinity to oxygen. However, the above methods also have drawbacks such as insufficient stability and reduction in carrier mobility.